Phys.org -
19 Feb 2022 03:00

A new accelerator chip called Hiddenite that can achieve state-of-the-art accuracy in the calculation of sparse hidden neural networks with lower computational burdens has now been developed by Tokyo Tech researchers. By employing the proposed on-chip model construction, which is the combination of weight generation and supermask expansion, the Hiddenite chip drastically reduces external memory access for enhanced computational efficiency.
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